Higher Abstraction
Shift-Left Methodologies
Significantly Enhance the probability of success
of your next semiconductor chips
SystemC Modelling - IP & Services
Higher Abstraction Shift Left Methodologies
Fast Simulation Models of CPU, IP, SoC & System at an abstraction level Above RTL using high level languages - C++ / SystemC
Significantly Enhances the Probability of Success
- Early Identification & Resolution of Flaws - Flaws in Architecture, Specs, Functionality
- Pre-Silicon Firmware development & Testing
- Automated CI/CD flow for firmware throughout the lifecycle of product
- Optimize Architecture for target application - Performance, Power, Area, Thermal, ..
- Reduce Cost. Reduce Time to Market
- Early Engagement with potential customers
- Easy to roll out future variants of the SoC
Supporting the Industry since 2005
We are the only company with a 100% focus on ESL, with deep expertise across all aspects of higher abstraction shift-left.
We are proud to work with leading semiconductor & systems companies in the following domains.









Most of our customer engagements have been active for over 10 years, making us their SoC modelling partner of choice.
Awards & Recognition
Forbes DGEMS 2024
Select 200 companies with global business potential
Accellera Systems Initiative
Outstanding Contribution Award
JSS - STEP
Good Governance Award
Success Stories
We collaborated with CircuitSutra on a project related to virtual prototyping of a complex SoC. The team demonstrated strong skills in programming and deep understanding SystemC and TLM 2.x capabilities. Additionally, it’s not so simple to arrange remote collaboration of developers working in a different geographical area and time zone. Nevertheless, I would emphasize the perfect organization of software development in CircuitSutra and arrangement of efficient joint work on the project. I am highly satisfied collaboration with the team.
Vladimir IvanovPrincipal Engineer, Mobile SoC Development Department, LG Electronics
CircuitSutra developed the TLM Kit and convenience sockets for our proprietary SoC bus.The kit is compliant with Accellera TLM2.0 and can be used to develop the SystemC models of peripheral IP.The kit relieves the model developer from the complexity of TLM rules for modeling data communication at different abstraction levels ranging from loosely timed to cycle accurate TLM, and exposes very simple to use abstraction independent APIs. The level of abstraction can be changed at run time, allowing the modeler to dynamically adjust the performance accuracy trade-off, for instance, to support “fast-forwarding”. CircuitSutra came up with an innovative design that is extensible and can be easily adapted for any SoC bus architecture. They also developed a very comprehensive testsuite and ensured high functional coverage.
Tor JeremiassenSimulation and Modeling CTO, Texas Instruments
CircuitSutra have successfully executed several modeling projects with us that includes developing Convenience sockets and TLM kit for our SoC bus architecture, Virtual Platform development, Integrating Virtual platform with the debugger and other tools, OS bring up on the virtual platform, SystemC Models of Image processing IP, Audio IP, OS bringup on VP. During the project execution they also communicated with our vendors and customers and ensured the high quality delivery of releases in timely manner. CircuitSutra have strong expertise in modeling domain. We recognize CircuitSutra as our partner to provide services for the System Modeling domain
Amit Nene Engineering Manager,Texas Instruments.
Circuitsutra have displayed an in depth knowledge of SystemC and TLM-2.0, using excellent C++ skills, producing novel and efficient solutions to complex modeling problems in a timely a cost effective manor..
Mark BurtonGreenSocs Ltd, UK
CircuitSutra works with OCP-IP on use of the OCP Modeling Kit in virtual platforms, and their technical work has been excellent in all areas including SystemC/TLM-2, processor models and embedded Linux adaptation. CircuitSutra's committment to achieving a high quality final result has been unwavering. The code, which can be downloaded from OCP-IP, illustrates how the OCP protocol can be abstracted for virtual platform modeling and OCP's compatibility with TLM-2.0
James AldisOCP-IP Director and Lead Architect of OCP-IP System Level Design Working Group.
Circuitsutra supported ASTC with the System Model testing services and that ASTC has been happy with the responsiveness and quality of this work.
Jay YantchevCEO, ASTC, Australia
We are very pleased that CircuitSutra developed, first in the world, a demo SystemC model set compliant with our TL Modeling Guide second edition. By studying this newly developed demo model set, engineers can easily understand the technique or transaction level modeling. The demo set will undoubtedly accelerate the widespread use of TLM methodology in the Industry.
Mr. Sho SanoSenior Manager, Design Standard Group, Planning Department, STARC, Japan